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Espressif Systems /ESP32-H2 /RMT /CH0_RX_STATUS

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Interpret as CH0_RX_STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MEM_WADDR_EX0APB_MEM_RADDR0STATE0 (MEM_OWNER_ERR)MEM_OWNER_ERR 0 (MEM_FULL)MEM_FULL 0 (APB_MEM_RD_ERR)APB_MEM_RD_ERR

Description

Channel 0 status register

Fields

MEM_WADDR_EX

This register records the memory address offset when receiver of CHANNEL%s is using the RAM.
APB_MEM_RADDR

This register records the memory address offset when reads RAM over APB bus.
STATE

This register records the FSM status of CHANNEL%s.
MEM_OWNER_ERR

This status bit will be set when the ownership of memory block is wrong.
MEM_FULL

This status bit will be set if the receiver receives more data than the memory size.
APB_MEM_RD_ERR

This status bit will be set if the offset address out of memory size when reads via APB bus.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data